Modeling of Gate Leakage, Floating Body Effect, and History Effect in 32nm HKMG PD-SOI CMOS

The High-K Metal Gate (HKMG) technology has become the keystone to reduce gate leakage and enable the continuous scaling of transistors towards 32nm node and beyond. However, the reduction of gate leakage in 32nm HKMG PD (Partially Depleted)-SOI (Silicon-On-Insulator) CMOS (Complementary Metal–Oxide–Semiconductor) inevitably changes the modeling methods for gate current, floating body effect, and history effect that were used in poly gate technology. Consequently the modeling of SOI transistor needs to account for the change of gate leakage and diode currents as well. In this study, we investigated the gate leakage, floating body effect, and history effect in 32nm HKMG PD-SOI CMOS transistors, and developed comprehensive SOI gate leakage and diode current models for the purpose of circuit simulation and design. Compared to 45nm poly gate PD-SOI transistors, the gate leakage in 32nm HKMG counterparts is at least one order lower, the floating body voltage has been reduced, and history effect in high-threshold (HVT) devices at Vdd=0.9V and T=25C is decreased from 8% to 2%.